The number of texture samplers available is 16. MaxPShaderInstructionsExecuted should be at least 2^16. The number of instructions run can be much higher because of the looping support. Instruction CountĮach pixel shader is allowed anywhere from 512 up to the number of slots in MaxPixelShader30InstructionSlots (not more than 32768). There is no limit on texture instructions. Arbitrary SwizzleĪrbitrary swizzle is supported. Independently, loop - ps/ rep - ps instructions can be nested to a maximum depth of 4. The call - ps/ callnz / call_pred can be nested to a maximum depth of 4. The number of temporary registers supported is 32. The depth of nesting ranges from 0 to 24. The device supports dynamic flow control ( if bool - ps, break - ps, and break_comp - ps). Input declarations take the usage names, and multiple usages are permitted for components of a given register. Color registers (v#) are now fully floating point and the texture coordinate registers (t#) have been consolidated. Source Register Swizzling gives additional control over which register components are read, copied, or written.Īdd a face register.Pixel Shader Source Register Modifiers alter the source register data before the instruction runs.Destination Register Write Mask determines what components of the destination register get written.Modifiers Are used to modify the way an instruction works.ps_3_0 Registers lists the different types of registers used by the pixel shader ALU.ps_3_0 Instructions contains a list of the available instructions.Additional control can be applied to modify the instruction, the results, or what data gets written out. Registers transfer data in and out of the ALU. A programmable pixel shader is made up of a set of instructions that operate on pixel data.